Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

G - Physics

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G11C 11/34 (2006.01) G05F 3/20 (2006.01) G11C 7/00 (2006.01) G11C 11/4074 (2006.01) G11C 11/409 (2006.01) G11C 11/4091 (2006.01)

Patent

CA 1166746

- 8 - SEMICONDUCTOR MEMORY DEVICE ABSTRACT OF THE DISCLOSURE Disclosed is a semiconductor memory device which comprises a sense amplifier formed on a semiconductor substrate, paired bit lines connected to the sense amplifier and memory cells connected to the bit lines wherein a predetermined bias voltage is applied to the semiconductor substrate and the reading operation is performed by amplifying by the sense amplifier a voltage difference caused between the paired bit lines owing to access to the memory cells. This semiconductor memory device is characterized in that a voltage of a phase reverse to a noise to the bias voltage applied to the semiconductor substrate is applied to the semiconductor substrate through an electrostatic capacitance formed on the semiconductor substrate to cancel the noise. By virtue of this characteristic feature, influences of such noises can be eliminated in the semiconductor memory device of the present invention.

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