Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

G - Physics

11

C

352/81

G11C 29/00 (2006.01) G06F 11/10 (2006.01)

Patent

CA 1179060

Abstract of the Disclosure A semiconductor memory device comprises at last one word line, a plurality of bit lines extending across the word line, a data memory cell unit including a plurality of data memory cells connected between the word line and the bit lines for storing information, a plurality of first extra bit lines corresponding to first gorups of the bit lines, each of which has k bit lines (k is an integer), and extending across the word line, a plurality of first extra memory cells connected between the word line and the first extra bit lines for storing first checking information with respect to the first gorups of the bit lines, a plurality of second extra bit lines corres- ponding to second groups of the bit lines, each of which group has m bit lines (m is an integer), and extending across the word line, a plurality of second extra memory cells connected between the word line and the second extra bit lines for 5 storing second checking information with respect to the second groups of the bit lines, an error detection circuit for comparing the information fed from the data memory cells with the contents of the first and second extra memory cells to' detect errors, and a ciruit responsive to an output from the error detection circuit for correcting the information fed from the data memory cells, the first extra bit lines being grouped correspondingly to the first groups of the bit lines, the second extra bit lines being goruped correspondingly to the second groups of the bit lines, each of the second groups of the second extra bit lines being composed of the of the first extra bit lines in each first group thereof.

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