G - Physics – 11 – C
Patent
G - Physics
11
C
352/40
G11C 11/34 (2006.01) G11C 11/404 (2006.01) H01L 27/085 (2006.01) H01L 27/108 (2006.01)
Patent
CA 1164562
Abstract of the Disclosure A semiconductor memory device comprises a gate electrode provided via a gate insulating film on a semi- conductor layer formed on a substrate and two diffused semi- conductor regions provided to form a field effect transistor together with the gate electrode. An electrical charge is supplied to one of the diffused regions from the other region to thereby vary a width of a space charge layer appearing around the one diffused region so that informations "1" and "0" are selectively stored in the device. The stored information is read-out by detecting presence or absence of a buried channel between the space charge layer and the substrate.
369709
Itsumi Manabu
Tsuchiya Toshiaki
Macrae & Co.
Nippon Telegraph & Telephone Public Corporation
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