H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/162
H01L 29/02 (2006.01) H01L 21/46 (2006.01) H01L 21/74 (2006.01) H01L 21/86 (2006.01) H01L 23/482 (2006.01) H01L 27/06 (2006.01) H01L 27/092 (2006.01) H01L 27/12 (2006.01) H01L 29/786 (2006.01)
Patent
CA 1237828
- 30 - SEMICONDUCTOR-ON-INSULATOR (SOI) DEVICES AND SOI IC FABRICATION METHOD Abstract A new SOI device which permits both the kink effect to be avoided and threshold voltage to be regulated, as well as a new method for fabricating SOI ICs, is disclosed. The new device includes an electrically conductive pathway extending from the active volume and terminating in a non-active region of the substrate of the device. A back-gate bias is communicated to, and kink- inducing charges are conducted away from, the active volume through the conductive pathway. The new fabrication method permits SOI ICs to be fabricated using available circuit designs and pattern delineating apparatus, e.g., IC mask sets. This method involves the formation of a precursor substrate surface which includes islands of insulating material, each of which is encircled by a crystallization seeding area of substantially single crystal semiconductor material. The boundaries of the islands are defined with a first pattern delineating device, e.g., a mask, which, in terms of the pattern it produces, is substantially identical to a second pattern delineating device. The latter device is a component of pattern delineating apparatus used in forming an IC, e.g., an IC mask set, the component being used to delineate the device regions of the IC. A layer of non- single crystal semiconductor material is formed on the precursor substrate surface, and crystallized with little or no displacement of the islands. The pattern delineating apparatus is then used to form an IC in the crystallized material.
485553
Ng Kwok K.
Sze Simon M.
American Telephone And Telegraph Company
Kirby Eades Gale Baker
LandOfFree
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