Semiconductor package and manufacturing method thereof

Details Semiconductor package and manufacturing method thereof Semiconductor package and manufacturing method thereof

H - Electricity

01

L

H01L 23/12 (2006.01)

Patent

CA 2536799

A semiconductor package includes a semiconductor element having a circuit element arranged on a first surface of a semiconductor substrate; an external wiring region arranged on a second surface of the semiconductor substrate; a support substrate arranged on the first surface of the semiconductor substrate; an electrode pad arranged on the first surface of the semiconductor substrate; and a through electrode reaching from the electrode pad to the second surface of the semiconductor substrate.

L'invention concerne un boîtier de semi-conducteur qui comprend un élément semi-conducteur possédant un élément de circuit disposé sur une première surface d'un substrat semi-conducteur ; une zone de câblage externe disposée sur une deuxième surface du substrat semi-conducteur ; un substrat de support disposé sur la première surface du substrat semi-conducteur ; une plaquette d'électrode disposée sur la première surface du substrat semi-conducteur ; et une électrode traversante qui atteint la deuxième surface du substrat semi-conducteur depuis la plaquette d'électrode.

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