Semiconductor package and method of preparing same

Details Semiconductor package and method of preparing same Semiconductor package and method of preparing same

G - Physics

03

F

G03F 7/00 (2006.01) G03F 7/075 (2006.01) G03F 7/42 (2006.01) H01L 23/31 (2006.01)

Patent

CA 2438126

A semiconductor package comprising a wafer having an active surface comprising at least one integrated circuit, wherein each integrated circuit has a plurality of bond pads; and a cured silicone layer covering the active surface of the wafer, provided at least a portion of each bond pad is not covered with the silicone layer and wherein the silicone layer is prepared by the method of the invention.

L'invention concerne un boîtier de semi-conducteur comprenant une tranche dotée d'une surface active qui renferme au moins un circuit intégré, chaque circuit intégré comprenant une pluralité de plages de connexion; et une couche de silicium durci recouvrant la surface active de la tranche, une partie au moins de chaque plage de connexion n'étant pas recouverte par ladite couche de silicium. L'invention concerne également un procédé de préparation de couche de silicium.

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