Semiconductor package, semiconductor device, electronic...

H - Electricity – 01 – L

Patent

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H01L 21/60 (2006.01) H01L 23/485 (2006.01)

Patent

CA 2340108

An insulating layer (3) is formed on a Si wafer (1). An opening portion is made in this insulating layer (3), and subsequently a rerouting layer (2) is formed. Next, a resin layer (4) is formed on the rerouting layer (2). The resin layer (4) is then cured so that the rerouting layer (2) and a Cu foil (5) are bonded to each other through the resin layer (4). Thereafter, a ring-like opening portion (4a) is made in the resin layer (4), and a Cu plating layer (8) is formed inside this opening portion (4a).

L'invention concerne une couche isolante (3) formée sur une plaquette de silicium (1), et une couche de recâblage (2) formée après la formation d'une ouverture sur la couche isolante (3). On forme une couche de résine (4) sur la couche de recâblage (2), puis on la traite et l'utilise pour lier la couche de recâblage (2) à des feuilles de cuivre (5). Finalement, on ménage une ouverture annulaire (4a) dans la couche de résine (4), puis on forme une couche plaquée de cuivre (8) dans l'ouverture (4a).

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