Semiconductor passivation method

Details Semiconductor passivation method Semiconductor passivation method

H - Electricity

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356/171

H01L 21/306 (2006.01) H01L 21/56 (2006.01) H01L 23/29 (2006.01) H01L 23/31 (2006.01) H01L 29/06 (2006.01)

Patent

CA 1165013

PHB 32700 18 ABSTRACT: The surface termination of a p-n junction of a semiconductor device is passivated with semi-insulating material which is deposited on a thin layer of insulating material formed at the bared semiconductor surface by a chemical conversion treatment at a temperature above room temperature. The layer may be formed by oxidising the semiconductor material of the body for example in dry oxy- gen between 300°C and 500°C or in an oxidising liquid con- taining for example hydrogen peroxide or nitric acid at for example 80°C. The layer is sufficiently thin to permit conduction (e.g. by tunnelling) between the semi-insulating material and the surface but thick enough to reduce said This increases the spread of the junction depletion layer along the surface thereby permitting a high breakdown volt- age even with a high resisitivity for the material. The thin layer can also act as a barrier against gettering of lifetime-killers (e.g. gold) from the semiconductors body by the semi-insulating material. The semi-insulating material may be based on amorphous or polycrystalline sili- con or a chalcogenide.

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