Semiconductor ram cells having superimposed capacitors

G - Physics – 11 – C

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352/82.3

G11C 11/08 (2006.01) G11C 11/404 (2006.01) H01L 27/07 (2006.01) H01L 27/108 (2006.01)

Patent

CA 1096499

PHN 8299 16.10.1976 ABSTRACT: In a 1 MOS/bit memory a high packing density is obtained by shifting the capacitors of adjacent columns one into the other in such manner that two capacitors belonging to different columns are formed by three conductive layers which are situated one above the other, the central layer can be connected to reference potential, the uppermost layer is connected to the MOST in the column and the lowermost layer is connected to a MOST in the other column. -34-

270915

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