G - Physics – 11 – C
Patent
G - Physics
11
C
G11C 7/00 (2006.01) G06F 11/10 (2006.01) G11C 8/00 (2006.01) G11C 29/00 (2006.01) G06F 11/00 (2006.01)
Patent
CA 2044441
A semiconductor storage system comprises a semi- conductor storage element array including a plurality of semiconductor memory elements, a data bus for transferring data to said semiconductor storage element array, an address bus for inputting an address to said semiconductor storage element array, a read/write controller for controlling read/write of the data written to said semiconductor storage element array, an interface control module for controlling a transfer/receipt of data and commands to and from an outside system, a microprocessor for generalization-controlling said read/write controller and said interface control module, a defect address memory for storing and outputting information on an address where at least one defective bit exists and an alternate address to be alternated with said address, and a defect address manipulating circuit for alternating said alternate address with said address where said defective bit exists in accordance with an output of said defect address memory.
Baba Hiroshi
Fujita Takashi
Hama Keizo
Mizuno Masahiro
Mitsubishi Denki Kabushiki Kaisha
Riches Mckenzie & Herbert Llp
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