Sense amplifier for static memory device

G - Physics – 11 – C

Patent

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352/82.3

G11C 11/34 (2006.01) G11C 7/06 (2006.01) G11C 11/419 (2006.01)

Patent

CA 1085511

Abstract of the Disclosure In a metal oxide silicon memory device having an array of memory cells, A sense amplifier for detec- ting signals produced by the cells connected between complementary bit lines. The amplifier includes a translator section that shifts the normally high bit and bit voltage levels to a lower voltage level at the control gates of signal output devices connected to out- put bus lines. Each output bus line has only a single device impedance to ground rather than the normally required stacked or series arrangement of control elements. This provides a low impedance to ground for one of the output bus lines while the signal vari- ation around threshold provides a relatively high impedance to ground on the other bus line, thereby providing fast response times.

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