Separate resetting of processors in a multiprocessor control

Details Separate resetting of processors in a multiprocessor control Separate resetting of processors in a multiprocessor control

G - Physics

03

G

314/7

G03G 15/00 (2006.01) G05B 19/042 (2006.01) G06F 11/00 (2006.01) G06F 11/14 (2006.01)

Patent

CA 1212987

ABSTRACT OF THE DISCLOSURE The present invention is a designated master processor in a multiprocessor machine control providing for the selective reset of the processors of the system in response to a system abnormality or software crash. Separate reset circuitry is provided with the master processor to provide separate reset signals to each of the other processors. Upon detection of the particular processor undergoing the crash, the master processor selectively activates the reset circuitry for that particular processor.

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