Sequential array logic

H - Electricity – 03 – K

Patent

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354/237

H03K 19/173 (2006.01) H03K 19/177 (2006.01)

Patent

CA 1252576

ABSTRACT OF THE DISCLOSURE A programmable, sequential logic array for performing logical operations within a memory ar- ray, including an input storage array having ad- dressable locations for storing input control words, input means for receiving a plurality of input signals and control words from the input storage array and producing signals indicating the re- lationship between conditions of the input signals and conditions represented by the control words, output means for providing binary output signals, an output storage array having addressable lo- cations for storing output control words for con trolling a state of the output means, a next address storage array for identifying a next address from one of a plurality of fields within the next address array, address generation means for receiving ad- dress signals from the next address storage array and for applying the address signals to address circuits of the input storage array, the output storage array, and the next address storage array, coding means for coding status of lines comprising an input/output interface for selectively ignoring predetermined status conditions, control means connecting the input means to the output means and responsive to signals produced by the input means to enable the output means to respond to selected output control words to selectively change outputs, and a subroutine control random access storage array for providing signals to the control means to control execution of subroutines.

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