Series-connected two-terminal semiconductor devices and...

Details Series-connected two-terminal semiconductor devices and... Series-connected two-terminal semiconductor devices and...

H - Electricity

01

L

356/134

H01L 21/28 (2006.01) H01L 21/68 (2006.01) H01L 21/78 (2006.01) H01L 23/373 (2006.01) H01L 25/07 (2006.01)

Patent

CA 1150852

ABSTRACT A method of fabricating a series-connected combination of two- terminal semiconductor devices on a common substrate in which active areas for the devices are provided by the deposition of a layer of high quality semiconductor on the surface of a temporary substrate. A first region of contact pattern conductors is formed on the free surface of the high quality semiconductor layer to provide a separate first contact to this layer, an insulating support substrate is bonded to the first contact pattern and the temporary substrate is removed to provide a second free surface of the high quality layer. A second region of contact pattern conductors is formed on the second free surface of the high quality semiconductor to provide a separate second contact to this layer for each of the devices. Active areas for the devices are defined by removal of regions of the high quality layer at any stage after beginning the formation of the first contact pattern so that parts of the first contact pattern are exposed when both the temporary substrate and such regions of the high quality layer have been removed. Series connection of the devices is then achieved by interconnecting the exposed parts of the first contact pattern with the appropriate parts of the second contact pattern.

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