Shared memory controller arrangement

Details Shared memory controller arrangement Shared memory controller arrangement

G - Physics

06

F

354/238

G06F 13/16 (2006.01) G06F 15/16 (2006.01) G06F 15/167 (2006.01)

Patent

CA 1307352

ABSTRACT A shared memory controller arrangement is disclosed wherein a number of local memories are primarily dedicated to the shared use of a number of local processors to increase the efficiency of use of both the processors and memories. A controller is associated with each local memory to control connection of any one of the local processors to its associated local memory. A local processor can also be connected via a controller and an adapter circuit connected to the controller to a system bus to obtain access to circuits connected thereto. In addition, a system processor connected to the system bus may also be connected to any particular one of the local memories via its associated controller and adapter connected thereto to load data of programs into the local memory for use by the local processors, and to read out the results of previous processing done by the local processors.

559931

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