G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 13/16 (2006.01) G06F 9/38 (2006.01) G06F 12/00 (2006.01) G06F 15/167 (2006.01)
Patent
CA 2378777
Multiple processors are connected to a single program store memory. Access to the program memory is controlled by an arbiter. There is a wide interface to the memory and local storage to reduce latency due to multiple processors attempting to access the memory simultaneously. There is also prefetch circuitry to further reduce this latency.
Inc. Catena Networks Canada
Kirby Eades Gale Baker
LandOfFree
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