Shift and rotate circuit for a data processor

G - Physics – 06 – F

Patent

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G06F 7/00 (2006.01) G06F 5/01 (2006.01) G06F 9/315 (2006.01) G06F 13/00 (2006.01) G11C 19/00 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 1039413

SHIFT AND ROTATE CIRCUIT FOR A DATA PROCESSOR Abstract of the Disclosure A shift and rotate circuit is disclosed for a processor which receives 16-bit words as input data, which breaks down each received word into four 4-bit bytes, and which performs logical and arithmetic operations on each word on a byte-by-byte basis. A word is shifted a speci- fied number of bit positions (1) by entering the word byte-by-byte in consecutive locations of a first 4-bit wide memory, (2) by entering the same word in an ordered byte sequence in a second 4-bit wide memory with the ordered sequence being determined by the number of bit positions the word is to be shifted, and (3) by concurrently applying the contents of both memories byte- by-byte to the shift and rotate circuit which shift the received information to the required number of bit positions and writes the shifted information into consecutive locations of the second memory. The 4-bit bytes of the shifted word are ultimately reconstituted into a 16-bit word and outputted onto the I/O system.

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