Shortened fire code error-trapping decoding method and...

H - Electricity – 03 – M

Patent

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H03M 13/00 (2006.01) H03M 13/17 (2006.01)

Patent

CA 2274106

An error-trapping decoder ( 10) is provided that performs right cyclic shifts of a received shortened codeword in a decode shift register (12). Consequently, the error burst portion of the received codeword is encountered in the register (12) within the length of the shortened code. In other words, the number of right cyclic shifts required by the shift register (12) to encounter the error burst portion of the received word is on the order of the length of the shortened word.

La présente invention concerne un décodeur à piégeage d'erreur capable d'effectuer des décalages cycliques à droite de mots de code abrégés reçus dans un registre de décodage à décalage (12). On retrouve ainsi dans le registre (12) la partie rafale d'erreur du code abrégé. Cela fait que le nombre de décalages cycliques à droite dont a besoin le registre à décalage (12) pour retrouver la partie rafale d'erreur du mot reçu est de l'ordre de la longueur du mot abrégé.

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