Shottky bipolar two-port ram cell

G - Physics – 11 – C

Patent

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352/82.1

G11C 11/40 (2006.01) G11C 8/16 (2006.01) G11C 11/411 (2006.01) G11C 11/416 (2006.01) H03K 3/286 (2006.01)

Patent

CA 1092239

Abstract of the Disclosure High ECL switching speeds and a very low standby power are achieved by the 34 square mil dual-port RAM cell in which two Schottky NPN transistors in a bistable flip-flop circuit are flanked by an addition- al pair of transistors coupled between the flip-flop collectors and the two digit lines of the RAM. The bases of the flanking transistors are coupled to the A and B word lines so that a high signal on either or both of these word lines will enable the flanking transistors to sense the condition of the flip-flop.

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