Signal processing device having pll circuits

H - Electricity – 04 – L

Patent

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Details

H04L 7/027 (2006.01) H03K 3/0231 (2006.01) H03L 7/07 (2006.01) H03L 7/089 (2006.01) H04L 7/033 (2006.01) H03L 7/099 (2006.01)

Patent

CA 2131104

A signal processing device includes a first PLL circuit operating in synchronism with a serial input data signal, and a second PLL circuit operating in synchronism with an external reference clock signal. The oscillation frequency of the first PLL circuit is controlled by the second PLL circuit.

Appareil de traitement de signaux comprenant un premier circuit de boucle à phase asservie qui fonctionne en synchronisme avec un signal de données d'entrée série, ainsi qu'un second circuit de boucle à phase asservie qui fonctionne en synchronisme avec un signal d'horloge de référence extérieur. La fréquence d'oscillation du premier circuit est réglée par le second circuit.

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