Signal processor for a shaft encoder

H - Electricity – 03 – M

Patent

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375/4, 354/73

H03M 1/00 (2006.01) G06K 15/22 (2006.01)

Patent

CA 1041667

ABSTRACT OF THE DISCLOSURE A processor for converting signals generated by a shaft encoder into two separate pulse trains. The state of the output of the encoder is loaded into a register, whose output is used as an address to a memory device. Control information is stored in the memory device in accordance with a predetermined relationship between given addresses and output signals to be generated from the memory device. Respective output signals are generated upon the memory device being accessed by a given address. In the preferred embodiment, two sets of such signals are generated by the use of two shaft encoders, orthogonal to one another within a display-oriented pointing device, for representing the Cartesian coordinates of motion of the pointing device. The state of the output of the additional shaft encoder is also loaded into the register, with an additional register connected to the output of this first register for providing additional address bits used in accessing the memory device. Two sets of output pulse trains are thereby generated from the memory device, each of which consists to two separate pulse trains. Such pulse trains are utilized to provide cursor control signals to a display monitor.

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