Silicon gate ccd structure

Details Silicon gate ccd structure Silicon gate ccd structure

G - Physics

11

C

356/197, 352/82.

G11C 11/08 (2006.01) H01L 21/285 (2006.01) H01L 21/339 (2006.01) H01L 29/10 (2006.01) H01L 29/423 (2006.01) H01L 29/768 (2006.01)

Patent

CA 1101550

TI-5691 SILICON GATE CCD STRUCTURE ABSTRACT Processes for manufacturing two-phase charge coupled devices (CCDs) having marginally overlapping phase electrodes and utilizing a single insulating material. Offset self- alignment techniques are used to achieve accurate location of ion implanted potential well or potential barrier regions to achieve the required asymmetry of potential wells (or threshold voltages) in each gate region of the CCD with small bit or charge storage element sizes leading to structures having a high packing density. Fabrication of surface and buried channel structures is described.

257421

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