Simplified cache with automatic update

Details Simplified cache with automatic update Simplified cache with automatic update

G - Physics

06

F

354/241

G06F 12/08 (2006.01)

Patent

CA 1255395

ABSTRACT A simplified cache with automatic updating for use in a memory system. The cache and the main memory receive data from a common input, and when a memory write operation is performed on data stored at a memory location for which there is a corresponding cache location, the data is written simultaneously to the cache and to the main memory. Since a cache location corresponding to a memory location always contains a copy of the data at the memory location, there is no need for dirty bits or valid bits in the cache registers and the associated logic in the cache control. The main memory used with the invention may receive data either from a CPU or from I/O devices, and the cache includes apparatus permitting the CPU to perform cache read operations while the main memory is receiving data from an I/O device.

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