Simplified hardware implementation of a digital if translator

Details Simplified hardware implementation of a digital if translator Simplified hardware implementation of a digital if translator

H - Electricity

04

B

354/68

H04B 1/16 (2006.01) H03D 3/00 (2006.01) H04B 14/02 (2006.01)

Patent

CA 1228927

ABSTRACT OF THE DISCLOSURE There is disclosed an implementation of a digital intermediate frequency (IF) translator which accepts a digitally converted IF input and performs a complex mix to produce an IF baseband output in I (in-phase) and Q (quadrature phase ) format. The translator reduces the sampling rate and provides filtering to produce I and Q components which can be subsequently utilized to derive the information contained In the original analog input signal. The translator is implemented with a configuration which simplifies the complex mix required to produce I and q components and accumulates the samples to provide boxcar filtering prior to providing the I and Q components as outputs at a reduced sampling rate.

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