Single exposure process for preparing printed circuits

Details Single exposure process for preparing printed circuits Single exposure process for preparing printed circuits

H - Electricity

05

K

356/16

H05K 3/46 (2006.01) H05K 3/00 (2006.01) H05K 3/10 (2006.01) H05K 3/18 (2006.01) H05K 3/24 (2006.01)

Patent

CA 1219378

TITLE SINGLE EXPOSURE PROCESS FOR PREPARING PRINTED CIRCUITS ABSTRACT OF THE DISCLOSURE A process for preparing a two layer printed circuit having conductive interconnections wherein at least one layer of a photoadhesive composition is applied to a substrate bearing an electrically conductive circuit pattern and exposing said photoaadhesive layer or layers through a circuit image of three different optical deensities, i.e., zero, gray and opaque, removing portions of the photosensitive layer by solvent washout applying finely divided metal, alloy or plating catalyst to adherent image areas, optionally curing the printed circuit, e.g., heating or ultraviolet exposure and plating to form an interconnected electrically conductive circuit pattern. Multilayer printed circuits can also be prepared by repeating the steps using additional layers of photoadhesive material.

468941

Affiliated with

Also associated with

Rating

Single exposure process for preparing printed circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Single exposure process for preparing printed circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Single exposure process for preparing printed circuits will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1254231