Single trench mosfet-capacitor cell for analog signal...

H - Electricity – 01 – L

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H01L 29/92 (2006.01) H01L 27/06 (2006.01) H01L 27/092 (2006.01) H01L 29/423 (2006.01) H01L 29/78 (2006.01)

Patent

CA 2007909

Abstract of the Disclosure A process for forming a single trench MOS transistor/capacitor cell for analog signal processing, and the resulting structure, are disclosed. The transistor is formed by forming a first trench in the semiconductor substrate, lining the trench with a layer of insulating material, a layer of conducting material, and filling the trench with a layer of insulator. A doped region is formed adjacent the trench, which serves as a transistor source. A second trench is then formed which extends through and excavates a portion of the first trench. The second trench is lined with a layer of doped material and insulator. The doped material is isolated from the conductive layer lining the first trench. The second trench is then filled with a body of conductive material. The layer of doped material lining the second trench serves as the transistor drain and a capacitor output is extracted from the body of conductive material. The resulting structure acts as a trench gate MOS transistor having a capacitor output in series with the transistor drain. Further, a process is disclosed to include a trench gate complementary transistor in an adjacent trench structure. A complementary transistor circuit with a series connected capacitor is thereby obtained. 1403

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