Single wire and three wire bus interoperability

G - Physics – 06 – F

Patent

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Details

G06F 13/38 (2006.01) G06F 13/42 (2006.01)

Patent

CA 2567408

Embodiments disclosed herein address the need for interoperability between existing serial bus interfaces and a single wire bus interface. In one aspect, the output or outputs of a three wire interface (1220) are selected in a first mode and the output of one or more single wire interfaces (1110) are selected in a second mode. In another aspect, a converter (1420) takes a single wire bus and produces signals according to a three wire interface. In yet another aspect, a termination symbol is inserted in a single wire interface signal, to facilitate conversion of the signal and connection to a three wire interface (1410). In yet another aspect, a strobe signal and/or a clock signal are generated in response to a detected start symbol. In yet another aspect, a strobe signal is deasserted and /or a clock signal is deasserted in response to a detected termination symbol.

Dans ses différents modes de réalisation, l'invention permet l'interopérabilité entre des interfaces de bus sériels existantes et une interface de bus unifilaire. Selon un aspect, la ou les sorties d'une interface trifilaire (1220) sont choisies dans un premier mode et la sortie d'au moins une interface unifilaire (1110) est choisie dans un second mode. Selon un autre aspect, un convertisseur (1420) capte un bus unifilaire et produit des signaux conformes à une interface trifilaire. Selon encore un autre aspect, un symbole de terminaison est inséré dans un signal d'interface unifilaire afin de faciliter la conversion du signal et la connexion à une interface trifilaire (1410). Selon un autre aspect, un signal sonde et/ou un signal d'horloge sont générés en réponse à la détection d'un symbole de départ. Selon encore un autre aspect, un signal sonde est invalidé et/ou un signal d'horloge est invalidé en réponse à la détection d'un symbole de terminaison.

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