Slicer arrangement

Details Slicer arrangement Slicer arrangement

G - Physics

11

B

G11B 20/02 (2006.01) G11B 7/0045 (2006.01) G11B 7/005 (2006.01) G11B 20/10 (2006.01)

Patent

CA 2330203

A circuit arrangement including means (5) for determining a dicer level from incoming signal levels for slicing the incoming signal levels on the basis of the slicer level thus determined, includes a first (15, 21, 131, 43) and a second (16, 22, 132, 44) register circuit, which register circuits are connected to an output (11, 12) of a discriminator circuit (8). The discriminator circuit (8) compares an incoming signal level with a set discrimination level and is adapted to apply an incoming signal level to the first register circuit (15, 21, 131, 43) if the incoming signal level is higher than the set discrimination level and to apply an incoming signal level to the second register circuit (16, 22, 132, 44) if the incoming signal level is lower than the set discrimination level. The first (15, 21, 131, 43) and the second (16, 22, 132, 44) register circuit are adapted to determine a register mean value of at least two different incoming signal levels consecutively applied to the register circuit (15, 21, 131, 43;16, 22, 132, 44). A mean-value circuit (19) supplies a signal having a level which is a mean value of the register mean values determined by the first (15, 21, 131, 43) and second (16, 22, 132, 44) register circuit. The supplied signal represents both the set discrimination level and the slicer level.

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