G - Physics – 01 – R
Patent
G - Physics
01
R
356/198
G01R 31/26 (2006.01) G11C 29/02 (2006.01) G11C 29/50 (2006.01)
Patent
CA 1238124
A B S T R A C T STABILITY TESTING OF SEMICONDUCTOR MEMORIES Design/test technique to facilitate improved long-term stability testing of static memory arrays with high inherent data retention characteristics at extremely small standby current requirements. The test concept is based on the fact that defects in the standby con- dition system of a memory array have a bearing on the word line standby potential. Detection of word line potentials differing from their nominal value defined for the standby state, i.e. in the unselected operation mode, is accomplished by performing a disturb write operation into the partly or totally unselected array. As a result cells along a defect word line are less disturbed than those along a good one. This (inverted error pattern) is used for screening defect word lines which otherwise would show up as (long-term) data retention problems.
499842
Andrusch Georg
Baisch Joachim
Barsuhn Horst
Wernicke Friedrich C.
Wiedmann Siegfried K.
International Business Machines Corporation
Saunders Raymond H.
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