Structure and method for producing mask-programmed...

Details Structure and method for producing mask-programmed... Structure and method for producing mask-programmed...

G - Physics

01

R

356/117

G01R 31/26 (2006.01) G01R 31/28 (2006.01) G01R 31/3185 (2006.01) G06F 17/50 (2006.01) H01L 23/528 (2006.01) H01L 27/118 (2006.01)

Patent

CA 2016755

A structure and method for producing mask-configured integrated circuits which are pin compatible substitutes for user- configured logic arrays is disclosed. Mask-defined routing lines having resistive/capacitive characteristics simulating those of user-configurable routing paths in the user-configurable logic array are used in the mask-defined substitutes to replace the user-configurable routing paths. Scan testing networks are formed in the metal-configured substitutes to test the operability of logical function blocks formed on such chips. The scan testing networks comprise a plurality of test blocks each including three field effect pass transistors formed of four adjacent diffusion regions. Proper connection of the gates of these pass transistors to control lines controlling the transistors is tested by trans- mitting alternating high/low signals through serial conduction paths including the gate electrodes of these transistors.

Affiliated with

Also associated with

Rating

Structure and method for producing mask-programmed... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Structure and method for producing mask-programmed..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Structure and method for producing mask-programmed... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1400177