Sub-pixel generation for high speed color laser printers...

Details Sub-pixel generation for high speed color laser printers... Sub-pixel generation for high speed color laser printers...

G - Physics

03

G

G03G 13/05 (2006.01) G03G 15/00 (2006.01) G03G 15/05 (2006.01)

Patent

CA 2618401

Methods and apparatus for optimizing the phase lock loop circuitry of subpixel clock generators for situations where frequent switching between different system printing speeds, and hence clock frequencies are required. An optimizing circuit is associated with a sub-pixel clock generator for clamping an input voltage to a voltage controlled oscillator controlling clock frequency between a desired range. The clamping circuitry comprises a comparator for detecting when the voltage has moved out of the desired range and then charges or discharges a loop filter circuit controlling the input voltage to the VCO to keep the input voltage within the desired range.

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