Superposed quadrature modulated baseband signal processor

Details Superposed quadrature modulated baseband signal processor Superposed quadrature modulated baseband signal processor

H - Electricity

04

B

332/27, 354/99

H04B 15/00 (2006.01) H04L 25/03 (2006.01) H04L 27/36 (2006.01)

Patent

CA 1265851

ABSTRACT A signal processor comprising apparatus for converting an NRZ input signal to a double interval raised cosine pulse having an amplitude normalized to 1.0, combined with an apparatus for superimposing another single interval raised cosine pulse having a peak amplitude (A-1) on the former raised cosine pulse to provide a continuous superposed (modified) raised cosine output signal having no jitter or intersymbol-interference and with controllable main and side lobes.

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