Switching system for prioritized data packets

Details Switching system for prioritized data packets Switching system for prioritized data packets

H - Electricity

04

L

344/25

H04L 12/56 (2006.01)

Patent

CA 1297569

ABSTRACT A system for switching information packets assigned with two levels of semantic priorities between entering time multiplex lines and outgoing time multiplex lines, the read address of a packet in a buffer memory of a switch being stored in a queueing file associated with an outgoing port intended to transmit the packet. The read address is accompanied by a bit which defines the priority level of the packet. Each queueing file is comprised of two zones in series between the input and the output. Means is included for writing in the first zone only when the second zone is full, the first zone is accessible only to high priority level packets between the reading of files. The read addresses of low priority level packets, which were stored earlier than the read address of high priority level packet the oldest still being present in the file, is overwritten in equal number, at a maximum, to the number of read addresses stored in the first zone.

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