H - Electricity – 04 – J
Patent
H - Electricity
04
J
363/17
H04J 3/00 (2006.01) H04J 3/14 (2006.01) H04Q 11/06 (2006.01)
Patent
CA 1263898
A SYNCHRONIZATION ARRANGEMENT FOR TIME MULTIPLEXED DATA SCANNING CIRCUITRY ABSTRACT OF THE INVENTION Telecommunication switching systems are typically connected by high-speed digital data spans. These spans may commonly be T1 or T2 carriers using DS1 or DS2 data formats, respectively. These systems may contain duplex digital span control units. The present synchronization arrangement is an additional duplex control circuit. This synchronization arrangement includes n time multiplexed state machine for each copy of the digital span control unit. The state machine monitors data ready signals from its own copy as well as from the other copy of the digital span control unit. Other signals indicate whether the circuit is operating in a simplex or duplex mode and which circuit is the active and which is the standby copy. This circuitry detects whether the data ready signals for each copy are identically synchronized. If these data ready signals are not identically synchronized, then one copy of the circuitry waits a predetermined scan cycle time for the other copy of the circuit to catch up. For non-error conditions, the wait places the two copies back in synchronization. In order to avoid delaying down stream processing, this arrangement addresses these signals ahead of the time for which they are required for processing by the circuitry.
550105
Gte Communication Systems Corporation
R. William Wray & Associates
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