Synchronization set for a synchronous digital message...

H - Electricity – 04 – L

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H04L 7/04 (2006.01) H04J 3/06 (2006.01) H04J 3/07 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 2259644

A synchronization device (SYNC) for a synchronous digital message transmission system (SDH) serving the purpose of producing a synchronous output signal (STM-N) that consists of successive transport modules synchronized to a frame clock and of a digital input signal (PDH). The synchronization device (SYNC) exhibits the following: a receiver unit (SI) for receiving the input signal (PDH), packet assembly device (PAK) for packaging the input signal into subassemblies (VC-N) of the transport modules, buffer memory (BUF), a writer (WM) for writing data bits of the input signal (PDH) out of the subassemblies (VC-N) in the buffer memory (BUF) with a write clock (WCLK), a reader (RM) for reading data bits out of the buffer memory with a read clock (RCLK) in order to form the output signal, and a sending unit (SO) for sending synchronous output signals (STM-N). The effective bit rate of the subassemblies in comparison to the standardized value is either lowered or raised here by selecting the write clock (WCLK) lower than the read clock (RCLK).

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