Synchronizing clock signal generator

H - Electricity – 04 – L

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328/87

H04L 7/02 (2006.01) H04L 7/033 (2006.01)

Patent

CA 1278833

SYNCHRONIZING CLOCK SIGNAL GENERATOR ABSTRACT OF THE DISCLOSURE A synchronizing clock signal generator has, in combination with a PLL circuit, a signal delay circuit for delaying a reference input signal by a prescribed time and issuing a reference signal, and a shift register receptive of the reference input signal and a clock signal which is an oscillation signal from a voltage-controlled oscillator or a signal produced by frequency-dividing the oscillation signal by an integer, for issuing a comparison signal in synchronism with the clock signal. The comparison signal and the reference signal are compared in phase. Even if the reference input signal is not a pulse signal of a fixed frequency, a synchronizing clock signal can be reproduced, insofar as the reference input signal is a pulse signal with its polarity inverted at the time of a multiple of a prescribed natural period.

565041

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