Synchronous cycle steal mechanism for transferring data...

Details Synchronous cycle steal mechanism for transferring data... Synchronous cycle steal mechanism for transferring data...

G - Physics

06

F

354/230.86

G06F 9/06 (2006.01) G06F 3/00 (2006.01) G06F 3/06 (2006.01) G06F 9/26 (2006.01) G06F 11/34 (2006.01) G06F 13/00 (2006.01)

Patent

CA 1149070

ABSTRACT OF THE DISCLOSURE A flexible and versatile high performance input/output (I/O) controller for transferring data between a host processor and one or more I/O units. One feature for improving performance is the provision of an interleaving mechanism for inter- leaving two different modes of data transfer between the host processor and the I/O controller. One mode is the cycle stealing of data between the I/O controller and the main storage unit of the host processor with such cycle stealing being controlled by the I/O controller. The other mode is an I/O command type of data transfer mode which is under the control of the host processor and wherein for each word of data transferred the host processor supplies an I/O command and an I/O address to the I/O controller.

352402

Affiliated with

Also associated with

Rating

Synchronous cycle steal mechanism for transferring data... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Synchronous cycle steal mechanism for transferring data..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous cycle steal mechanism for transferring data... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-376462