H - Electricity – 04 – L
Patent
H - Electricity
04
L
354/104
H04L 13/00 (2006.01) H04J 3/07 (2006.01) H04L 5/24 (2006.01)
Patent
CA 2037748
Improved jitter performance is realized in a desynchronizer for obtaining an asynchronous digital signal, e.g., a DS3 signal, from a received synchronous digital signal, e.g., a Synchronous Optical Network (SONET) STS-1 signal. The improved jitter performance results from the use of a unique adaptive bit leaking arrangement in conjunction with a digital phase locked loop and synchronizing elastic store. An estimate of a bit leaking interval is adaptively obtained based on the intervals between a sequence of consecutive pointer adjustments in the received signal, i.e., the STS-1 signal. In one embodiment, the bit leaking interval estimate is obtained by employing a moving average of the intervals between the pointer adjustments. The desired bit leaking is effected by employing an accumulator which is responsive to the received pointer adjustments and a representation of the estimated bit leaking interval, in conjunction with a comparator. The accumulator output count is supplied to the comparator along with the current write address of the elastic store. Leak bits are supplied as an output from the comparator one at a time to the phase locked loop which, in turn, generates a smooth read clock for the elastic store.
Duff Donald G.
Lane Donald A.
Mediavilla Ricardo
American Telephone And Telegraph Company
Kirby Eades Gale Baker
LandOfFree
Synchronous digital signal to asynchronous digital signal... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Synchronous digital signal to asynchronous digital signal..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous digital signal to asynchronous digital signal... will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1345019