Synchronous protocol data formatter

Details Synchronous protocol data formatter Synchronous protocol data formatter

H - Electricity

04

J

363/10

H04J 3/22 (2006.01) H04J 3/16 (2006.01) H04Q 11/04 (2006.01)

Patent

CA 1331228

- 9 - Abstract A synchronous protocol data formatter handles all 24-32 channels of a so-called primary rate version of a digital multiplexed interface or ISDN Primary Rate Interface for a communication system. The formatter relieves the host computer of the local area network of some highly specialized tasks, and, at thesame time, provides the following augmented capabilities, which exceed those required by the C.C.I.T.T. standard, I431: 1. dynamic channel bandwidth alloction can assign arbitrary (even non-adjacent) time slots to create a super channel; 2. a circular interrupt-queue in a shared memory enables the formatter and the host computer of the local area network to interact efficiently in updating and responding to changing conditions; and 3. cyclical redundancy codes can be used on a more flexible basis than heretofore, e.g., can be generated upon only address and control fields fordigitized voice signals, or, in a relay mode, can substitute an existing cyclical redundancy code to guard against memory errors.

593851

Affiliated with

Also associated with

Rating

Synchronous protocol data formatter does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Synchronous protocol data formatter, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Synchronous protocol data formatter will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1316584