System and method for efficient uncorrectable error...

Details System and method for efficient uncorrectable error... System and method for efficient uncorrectable error...

H - Electricity

03

M

H03M 13/29 (2006.01) G11C 7/24 (2006.01) H03M 13/19 (2006.01) G11C 16/02 (2006.01)

Patent

CA 2588858

A system and method for efficient uncorrectable error detection in flash memory is described. A microcontroller including a non-volatile flash memory utilizes an Error Correction Code (ECC) having a certain error detection and correction bit strength. The user data is first processed by a hash function and hash data is stored with the user data. Then, the user data and hash data are processed by the ECC system. In detection, the hash ensures that a relatively low bit- strength ECC system did not incorrectly manipulate the user data. Such a hash integrity check provides an efficient, robust detection of incorrectly corrected user data resulting from errors beyond the correction but strength of the ECC system utilized.

Affiliated with

Also associated with

Rating

System and method for efficient uncorrectable error... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with System and method for efficient uncorrectable error..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System and method for efficient uncorrectable error... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1594790