H - Electricity – 03 – M
Patent
H - Electricity
03
M
H03M 7/20 (2006.01) H03M 5/14 (2006.01)
Patent
CA 2044051
SYSTEM AND METHOD FOR ERROR DETECTION AND REDUCING SIMULTANEOUS SWITCHING NOISE Abstract A system and method that reduces the simultaneous switching noise of outputs and the processing delays caused by inductance by using an encoding scheme that results in a net signaling current of substantially zero at each cycle time for the fast parallel switching networks of digital IC chips and that provides multiple types of error detection.
Duncan Samuel H.
Smelser Donald W.
Wade Paul C.
Digital Equipment Corporation
Duncan Samuel H.
Smart & Biggar
Smelser Donald W.
Wade Paul C.
LandOfFree
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