System and method for fault-tolerant clock synchronization...

G - Physics – 06 – F

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G06F 1/14 (2006.01)

Patent

CA 2387056

A method for synchronizing nodes in a network is described that utilizes an interactive convergence technique. The technique utilizes communications protocol IEEE 1394 to broadcast each node's clock value to the other nodes in the network in step 301. Each node applies a voting algorithm to the set of broadcasted clock values to determine a voted clock value in step 303 and each node's clock is set to that voted clock value in step 305. When a node's clock value is close in value to another node, those nodes are considered to be synchronized in step 302. The set of clock values to be used to determine the voted clock value consists of those nodes that are synchronized. The technique is implemented on hardware separate from the node's hardware and can be implemented on a field programmable gate array.

La présente invention concerne un procédé de synchronisation de noeuds dans un réseau par mise en convergence interactive en utilisant le protocole IEEE 1394 pour diffuser aux autres noeuds du réseau (301) la valeur d'horloge de chaque noeud. Chaque noeud applique un algorithme de vote à l'ensemble des valeurs d'horloge diffusées pour déterminer une valeur d'horloge votée (303), l'horloge de chaque noeud étant initialisée à cette valeur votée (305). Lorsque la valeur d'horloge d'un noeud est proche de celle d'un autre noeud, on considère que ces noeuds sont synchronisés (302). L'ensemble des valeurs d'horloge à utiliser pour déterminer la valeur de synchronisation votée est constitué des noeuds qui sont synchronisés. Cette technique, qui se met en oeuvre sur le matériel indépendamment du matériel du noeud peut se mettre en oeuvre au niveau d'une matrice de portes programmable sur site.

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