System and method for semaphore and atomic operation...

G - Physics – 06 – F

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G06F 13/00 (2006.01) G06F 15/173 (2006.01)

Patent

CA 2414438

A method and apparatus including a plurality of data processing units. A plurality of memory banks having a shared address space are coupled to the processors by a crossbar coupling to enable reading and writing data between the processors to enable cache coherency messages to be transmitted from the memory to the processors. A plurality of semaphore registers are implemented with the shared address space of the memory banks wherein the semaphore registers are accessible by the processors throught eh crossbar coupling.

L'invention concerne un procédé et un dispositif comprenant une pluralité d'unités de traitement de données. Un pluralité de blocs de mémoire partageant un même espace adresse sont couplés aux processeurs par un couplage crossbar pour permettre la lecture et l'écriture de données entre les processeurs et les blocs de mémoire. Un réseau unidirectionnel couple les blocs de mémoire et les processeurs afin de permettre la transmission de messages de cohérence de caches entre la mémoire et les processeurs. Une pluralité de registres de sémaphores sont mis en oeuvre dans l'espace adresse partagé des blocs de mémoire, les registres de sémaphores étant accessibles par les processeurs par l'intermédiaire du couplage crossbar.

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