System architecture for electronic devices

Details System architecture for electronic devices System architecture for electronic devices

H - Electricity

04

L

H04L 12/40 (2006.01) G06F 13/362 (2006.01) G06F 13/42 (2006.01) H04L 12/403 (2006.01)

Patent

CA 2310772

A system architecture includes a central controller having a framing pulse output, a serial digital bus connected to the central controller, and a plurality of peripheral devices connected to the serial bus. Each peripheral device has a framing pulse input and a delayed framing pulse output. The peripheral devices and the central controller are connected in a daisy chain arrangement so that the framing pulse output of the central controller is connected to the framing pulse input of the first device. The delayed framing pulse output of the first device is connected to the framing pulse input of the second device and so on throughout the chain. In this way the individual peripheral devices can be addressed in a frame defined by their framing pulse input and delayed framing pulse output.

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