System for controlling access to channel buffers

Details System for controlling access to channel buffers System for controlling access to channel buffers

G - Physics

06

F

354/237

G06F 13/00 (2006.01) G06F 12/08 (2006.01) G06F 13/12 (2006.01)

Patent

CA 1187198

ABSTRACT OF THE DISCLOSURE A computer system comprising a plurality of channels (10-0 ? 10-31), at least one main storage unit (1-0 ? 1-3), and a memory control unit (2) having a channel buffer (3) therebetween. The channel buffer comprises a tag portion (11) divided into a plurality of sets (SET0 ? SET31) of blocks (11-0, 11-1), tag lines, and a data portion (12) having a plurality of data lines each corresponding to one of the tag lines. Each set of the tag portion is defined by one of the channels.

404364

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