System for controlling mode changes in a voltage down-converter

Details System for controlling mode changes in a voltage down-converter System for controlling mode changes in a voltage down-converter

G - Physics

11

C

G11C 7/00 (2006.01) G05F 1/10 (2006.01) G05F 3/02 (2006.01) G05F 3/16 (2006.01) G05F 3/20 (2006.01) G11C 5/14 (2006.01)

Patent

CA 2498608

A voltage down-converter system, with a stand-by mode and an active mode, for a memory device with the following components. A charge node (68) is configured to receive a charge. A first transistor (54) has a first gate and the first transistor is configured to supply a load current to the memory device. A first switch (58) is coupled to the charge node and the first gate, the first switch being configured to apply the charge in the charge node to the first gate during transition from stand-by to active modes. A second transistor (66) is coupled to the first gate and configured to bias the first transistor to an inactive state during stand-by mode. A second switch (64) is coupled to the first gate and the second transistor, the second switch being configured to apply a voltage difference at the second transistor to the first gate during the stand-by mode.

L'invention concerne un convertisseur abaisseur de tension, comprenant un mode de réserve et un mode actif, pour une mémoire comprenant les composants suivants : un noeud de charge (68) conçu pour recevoir une charge ; un premier transistor (54) comprenant une première grille, ce premier transistor étant conçu pour fournir un courant de charge à la mémoire ; un premier commutateur (58) couplé au noeud de charge et à la première grille, ce premier commutateur étant conçu pour appliquer la charge du noeud de charge à la première grille pendant la transition entre le mode de réserve et le mode actif ; un second transistor (66) couplé à la première grille, ce second transistor étant conçu pour polariser le premier transistor à un état inactif pendant le mode de réserve ; un second commutateur (64) couplé au premier transistor et au second transistor, ce second commutateur étant conçu pour appliquer, au niveau du second transistor, une différence de tension à la première grille pendant le mode de réserve.

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