System for correction of single-bit error in buffer storage...

Details System for correction of single-bit error in buffer storage... System for correction of single-bit error in buffer storage...

G - Physics

06

F

354/224

G06F 11/00 (2006.01) G06F 11/10 (2006.01) G11C 29/00 (2006.01)

Patent

CA 1206265

SYSTEM FOR TREATMENT OF SINGLE-BIT ERROR IN BUFFER STORAGE UNIT ABSTRACT OF THE DISCLOSURE In a data processing device comprising a main storage unit, a buffer storage unit, and an ECC portion, when data held in the buffer storage unit contains a single-bit error, the data containing the single bit error is moved out from the buffer storage unit by generating a predetermined number of addresses having the same SET number as the data containing the single-bit error. The data is then corrected by the ECC portion, and the corrected data is stored in the main storage unit.

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