Systems and methods for enabling esd protection on 3-d...

Details Systems and methods for enabling esd protection on 3-d... Systems and methods for enabling esd protection on 3-d...

H - Electricity

01

L

H01L 25/065 (2006.01) H01L 23/48 (2006.01) H01L 23/60 (2006.01)

Patent

CA 2735689

An electrostatic discharge (ESD) protection device is fabricated in a vertical space between active layers of stacked semiconductor dies thereby utilizing space that would otherwise be used only for communication purposes. The vertical surface area of the through silicon vias (TSVs) is used for absorbing large voltages resulting from ESD events. In one embodiment, an ESD diode is created in a vertical TSV between active layers of the semiconductor dies of a stacked device. This ESD diode can be shared by circuitry on both semi-conductor dies of the stack thereby saving space and reducing die area required by ESD protection circuitry.

L'invention concerne un dispositif de protection de décharge électrostatique (ESD) fabriqué dans un espace vertical entre des couches actives de puces semi-conductrices empilées, utilisant ainsi un espace qui autrement n'aurait été utilisé qu'à des fins de communication. La zone de surface verticale des trous d'interconnexion en silicium (TSVs) est utilisée pour absorber des tensions importantes résultant des événements ESD. Dans un mode de réalisation, une diode ESD est créée dans une TSV verticale entre des couches actives des puces semi-conductrices d'un dispositif empilé. Cette diode ESD peut être partagée par les circuits sur les puces semi-conductrices de la pile, économisant ainsi de l'espace et réduisant la zone de puce requise par les circuits de protection ESD.

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