Systems, methods, and apparatus for qubit state readout

G - Physics – 06 – N

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G06N 99/00 (2010.01) H01L 39/22 (2006.01)

Patent

CA 2698132

A superconducting readout system includes a computation qubit; a measurement device to measure a state of the computation qubit; and a latch qubit that mediates communicative coupling between the computation qubit and the measurement device. The latch qubit includes a qubit loop that includes at least two superconducting inductors coupled in series with each other; a compound Josephson junction that interrupts the qubit loop that includes at least two Josephson junctions coupled in series with each other in the compound Josephson junction and coupled in parallel with each other with respect to the qubit loop; and a first clock signal input structure to couple clock signals to the compound Josephson unction.

L'invention concerne un système de lecture supraconducteur comprenant un bit quantique de calcul; un dispositif de mesure destiné à mesurer un état du bit quantique de calcul; et un bit quantique de verrouillage qui sert d'intermédiaire pour un couplage de communication entre le bit quantique de calcul et le dispositif de mesure. Le bit quantique de verrouillage comprend une boucle de bit quantique dotée d'au moins deux bobines d'induction supraconductrices couplées en série entre elles; une jonction Josephson composite qui interrompt la boucle de bit quantique comprenant au moins deux jonctions Josephson couplées en série entre elles dans la jonction Josephson composite et en parallèle entre elles par rapport à la boucle de bit quantique; et une première structure d'entrée de signaux d'horloge destinée à coupler des signaux d'horloge à la jonction Josephson composite.

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