Tag control circuit for buffer storage

G - Physics – 06 – F

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354/238

G06F 12/08 (2006.01) G06F 13/38 (2006.01) G06F 15/16 (2006.01)

Patent

CA 1241768

TAG CONTROL CIRCUIT FOR BUFFER STORAGE ABSTRACT OF THE DISCLOSURE A tag control circuit in a memory access control apparatus in a digital computer system including a central processor having a buffer storage, including a tag information store and update circuit, and a circuit for finding the necessity of operation for invalidation of the tag information and/or transmission of an invali- dation information to the central processor. The tag control circuit includes a first circuit storing a plurality of access requests of the necessity operation found at the necessity operation finding circuit, a second circuit storing a plurality of invalidation execute information found at the necessity operation finding circuit, and a circuit receiving a new access request and the access request stored in the first storing circuit and outputting one access request. The tag control circuit may further include a third circuit storing only store access requests before supplying them to the necessity operation finding circuit, an output of which is connected to the access request receiving and outputting circuit. The access request receiving an outputting circuit may output one access request defined by the following priority order: a new read access request, an access request stored in the first storing circuit, and an store access request stored in the third storing circuit.

484187

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